Description

Cadence Virtuoso is an integrated circuit (IC), systems on chip (SOC), and printed circuit board platform designed for SoC design engineers. It enables users to design components concurrently across chip, package, and board to minimize errors and design time. Virtuoso is ideal for designs that integrate multiple heterogeneous ICs, including RF, analog, and digital devices. Features include single, hierarchical schematic for automated layout vs. schematic (LVS) verification flow, IC verification methodology for generating testbench-ready schematics with system-level layout parasitic data, built-in, and 3D EM modeling of package-level passive devices.