Description

StarRC is an electronic design automation (EDA) solution designed for design engineers. It enables users to streamline the number of extraction corners required for analysis to be processed within a single run, perform timing-sensitive implementations such as clock networks, memories, analog/ mixed-signal/RF, and other IP designs, unify the Rapid3D fast field solver for critical net, IP, and custom circuit extraction, automate the design partitioning to multiple cores, and optimize the failure recovery for a fault-tolerant server environment. Features include circuit simulation flows, debugging capability, IC Validator physical verification, 2D substrate extraction, and color-aware multi-patterning at 10nm/7nm/5nm.